| 摘要 |
<p>A method for manufacturing a nonvolatile memory device is provided to increase breakdown voltage margin by forming a gate structure having a vertical sidewall profile. A tunnel dielectric, a preliminary first conductive pattern, a dielectric, and a second conductive layer are formed on a substrate of a second region. A gate dielectric(115), a third conductive layer, and a hard mask layer are formed on a substrate of a second region. The preliminary first conductive pattern, the dielectric, and the second conductive layer are patterned to form a first gate structure(111) comprised of a first conductive layer pattern(106b), a dielectric pattern(108b), and a second conductive layer pattern(110b). A first photoresist pattern for selectively exposing a source line region is formed on the second conductive layer pattern and the substrate. A second photoresist pattern for forming a hard mask pattern is formed on the hard mask layer. The hard mask layer is etched by using the second photoresist pattern as an etch mask to form the hard mask pattern. Impurity is implanted into the substrate by using the first photoresist pattern as an ion implantation mask to form a source line(150). The gate conductive layer is etched by using the hard mask pattern to form a second gate structure having a vertical sidewall profile.</p> |
