| 摘要 |
A method for forming a micro pattern in a semiconductor device is provided to form a gate electrode having a negative slope by minimizing a critical dimension of a photoresist pattern. An etching target layer is formed on a semiconductor substrate(100). A photoresist pattern is formed on the etching target layer. The etching target layer is etched by performing an etch process(170) using the photoresist pattern as an etch mask in order to form a negative slop on the etching target layer. The etch process is performed by using Cl2, NF3, O2, and N2 gases. The Cl2, NF3, O2, and N2 gases is formed with a ratio of Cl2: NF3: O2: N2= 5-6: 5-6: 1: 10. The etch process is performed by using a bias voltage of 120 to 150V.
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