发明名称 |
System and method to trace high performance multi-issue processors |
摘要 |
A system and method for program counter and data tracing in a multi-issue processor is disclosed. Instructions are traced in program sequence order. In one embodiment instructions are traced in graduation order from a reorder buffer. The tracing mechanism of the present invention enables increased visibility into the hardware and software state of the processor core. |
申请公布号 |
US7159101(B1) |
申请公布日期 |
2007.01.02 |
申请号 |
US20030448324 |
申请日期 |
2003.05.28 |
申请人 |
MIPS TECHNOLOGIES, INC. |
发明人 |
THEKKATH RADHIKA;TREUE FRANZ;KRAGH SOEREN;RAJAGOPALAN VIDYA |
分类号 |
G06F9/38 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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