发明名称 Memory control device and memory control method
摘要 There is provided memory control device and memory control method, which can prevent wiring complication by many crossing wirings, and reduction of yield and quality. When a memory control device CC 1 selects a memory chip CC 2 , an internal circuit of a select circuit 27 is changed by a switch signal SWS 2 . In this case, the changeover is made so that a select signal S 2 outputted from an internal circuit 40 is inputted to a predetermined memory terminal of the memory chip CC 2 . The select signal S 2 is inputted to the corresponding predetermined memory terminal of the memory chip CC 2 , and thereby, the memory chip CC 2 is activated, and set to a state capable of inputting and outputting control signals 21 to 25 . The control signals 21 to 25 are assigned to control terminals P 21 to P 27 after being hanged by the select circuit 27 in signal sequence corresponding to terminal array sequence of memory terminals 21 a to 27 a of the memory chip CC 2.
申请公布号 US7158437(B2) 申请公布日期 2007.01.02
申请号 US20040850113 申请日期 2004.05.21
申请人 FUJITSU LIMITED 发明人 KATO YOSHIHARU
分类号 G11C8/00;G11C11/41;G11C5/06 主分类号 G11C8/00
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