| 摘要 |
A COMPUTER SYSTEM COMPRISING n PROCESSOR UNITS (1-n) WHERE n IS A POSITIVE INTEGER, FIRST SWITCH (2), SECOND SWITCH (3), BUFFERING BLOCK (5) AND m ASSOCIATIVE MEMORY MODULES (4-n) WHERE m IS A POSITIVE INTEGER AND USING DATA FLOW CONTROL OVER COMPUTATIONS AND TO FURTHER INCLUSION OF PROCESSING MEANS UTILIZING THE VON NEUMANN PRINCIPLE OF COMPUTATION RESULTING IN AN IMPROVEMENT OF PERFORMANCE AND A DECREASE IN THE VOLUME OF ASSOCIATIVE MEMORY. (FIG. 1)
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