| 摘要 |
A DLL device is provided to reduce a locking time by adding another delay unit for directly selecting a delay time of a delay unit in accordance with a frequency of an external clock signal. A DLL(Dynamic Link Library) device includes buffers(200,201) receiving external clock signals, a first delay unit(202) receiving output signals from the buffers, a second delay unit(203) receiving a signal output from the first delay unit, a phase comparator(205) detecting a phase difference between the signal output from the second delay unit and the signal output from the buffer, a first control unit receiving a signal output from the phase comparator, and a second control unit controlling a delay time of the second delay unit. |
