发明名称 Method of forming metal/high-k gate stacks with high mobility
摘要 The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8x10<SUP>10 </SUP>charges/cm<SUP>2 </SUP>or less, a peak mobility of about 250 cm<SUP>2</SUP>/V-s or greater and substantially no mobility degradation at about 6.0x10<SUP>12 </SUP>inversion charges/cm<SUP>2 </SUP>or greater.
申请公布号 US2006289903(A1) 申请公布日期 2006.12.28
申请号 US20060513101 申请日期 2006.08.30
申请人 ANDREONI WANDA;CALLEGARI ALESSANDRO C;CARTIER EDUARD A;CURIONI ALESSANDRO;D EMIC CHRISTOPHER P;GOUSEV EVGENI;GRIBELYUK MICHAEL A;JAMISON PAUL C;JAMMY RAJARAO;LACEY DIANNE L;MCFEELY FENTON R;NARAYANAN VIJAY;PIGNEDOLI CARLO A;SHEPARD JOSEPH F JR;ZAFAR SUFI 发明人 ANDREONI WANDA;CALLEGARI ALESSANDRO C.;CARTIER EDUARD A.;CURIONI ALESSANDRO;D'EMIC CHRISTOPHER P.;GOUSEV EVGENI;GRIBELYUK MICHAEL A.;JAMISON PAUL C.;JAMMY RAJARAO;LACEY DIANNE L.;MCFEELY FENTON R.;NARAYANAN VIJAY;PIGNEDOLI CARLO A.;SHEPARD JOSEPH F.JR.;ZAFAR SUFI
分类号 H01L31/112;H01L21/00;H01L21/28;H01L21/336;H01L21/84;H01L29/49;H01L29/51;H01L29/76;H01L29/78;H01L29/786;H01L29/80;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 H01L31/112
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