| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device with a multilayer wiring structure which assuredly prevents the occurrence of cracks or peeling in an interlayer insulating film due to mechanical or thermal stresses. SOLUTION: The semiconductor device incorporates a seal ring 102 on a periphery including a corner (chip corner section) in a chip region 101 on a semiconductor substrate, as well as a primary dummy wiring 103a and a secondary dummy wiring 103b which are laid out in a mesh pattern (lattice pattern) on the inner side further from the seal ring 102 in the chip region 101. A structure for reinforcing the chip strength is composed of the primary dummy wiring 103a and secondary dummy wiring 103b. The secondary dummy wiring 103b intersects with the primary dummy wiring 103a in an oblique direction (for example, direction at 45°). COPYRIGHT: (C)2007,JPO&INPIT
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