| 摘要 |
A phase-switching dual modulus prescaler having a dual modulus divider is provided. Said divider comprises a first and second divide-by-2 circuit (A;B), wherein said second divide-by-2 circuit (B) is coupled to the output of said first divide-by-2 circuit (A) and at least said second divide-by-two circuit (B) comprises a four phase output each separated by 90°. A phase selection unit (PSU) is provided for selecting one of the four phase outputs (I<SUB>p, I</SUB><SUB>n</SUB>, Q<SUB>p</SUB>, Q<SUB>n</SUB>; INi, INni, INq, Innq) of the second divide-by-2 circuit (B). Moreover, a phase control unit is provided for providing control signal (C 1 , NC 0 ; C 2 , NC 2 ; C 3 , NC 3 ) to the phase selection unit, wherein the phase selection unit (PSU) performs the selection of the four phase outputs (I<SUB>p</SUB>, I<SUB>n</SUB>, Q<SUB>p</SUB>, Q<SUB>n</SUB>; INi, INni, INq, Innq) according to the control signals (C 0 , NC 0 ; C 1 , NC 1 ; C 2 , NC 2 ). Said phase selection unit (PSU) is implemented based on direct logic. The implementation of the phase selection unit based on direct logic enables a higher speed and saves area on the chip.
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