发明名称 METHOD FOR FORMING PATTERN AND METHOD FOR MANUFACTURING INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a method for forming a pattern for reducing deformation in a pattern due to influences of an optical proximity effect in a manufacturing process of an integrated circuit. <P>SOLUTION: The method for forming a pattern includes: a step of creating design data of a circuit pattern (a); a step of dividing the design data into a plurality of data blocks, producing an optical projection image by each data block upon transferring the pattern, predicting a dimension of the pattern transferred onto a wafer based on the projection image, calculating a difference between the predicted pattern dimension and the pattern dimension by the design data, correcting the design data by using the calculated difference as a correction amount and generating corrected data by optical proximity effect correction occurring upon transferring the pattern onto a wafer (b); forming a mask pattern based on the corrected data (c); transferring the mask pattern onto a wafer by exposing through the mask pattern (d); and processing the wafer along the transferred mask pattern (e). When a modified illumination method is employed in an exposure apparatus, a light shielding pattern in a size equal to or smaller than a period corresponding to the cutoff frequency of three-beam interference is not regarded as an object for correction. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006350395(A) 申请公布日期 2006.12.28
申请号 JP20060272894 申请日期 2006.10.04
申请人 RENESAS TECHNOLOGY CORP 发明人 KAMON KAZUYA
分类号 G03F1/36;G03F1/68;H01L21/027 主分类号 G03F1/36
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