Integrated clock generator with programmable spread spectrum using standard PLL circuitry

摘要

An apparatus comprising a phase lock loop circuit and a control circuit. The phase lock loop circuit may be configured to generate an output signal having a first frequency in response to (i) an input signal having a second frequency, (ii) a first divider value and (iii) a second divider value. The second divider value may control spread spectrum modulation of the phase lock loop circuit. The control circuit may be configured to generate the second divider value in response to (i) the output signal and (ii) a programmable control signal.