发明名称 METHOD FOR FORMING INTER LAYER DIELECTRIC LAYER IN SEMICONDUCTOR DEVICE
摘要 A method for forming an interlayer dielectric of a semiconductor device is provided to reduce a dielectric constant and to prevent the penetration of moisture through voids by using a PE(Plasma Enhanced)-oxide layer with voids and an SOG(Silicon On Glass) oxide layer without voids. A plurality of metal lines are formed in X and Y axis directions on a substrate(110). A triple point is formed on the resultant structure. A first insulating layer is deposited between the metal lines formed in the Y axis direction on the resultant structure. The first insulating layer has first voids(113a) and second voids. A first upper portion of the first void is closed and a second upper portion of the second void is opened at the triple point. A second insulating layer(114) for filling the second voids is formed on the resultant structure. The first insulating layer is a PE-oxide layer. The second insulating layer is an SOG oxide layer.
申请公布号 KR20060133695(A) 申请公布日期 2006.12.27
申请号 KR20050053466 申请日期 2005.06.21
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, CHAN BAE
分类号 H01L21/31 主分类号 H01L21/31
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