发明名称 Flip-chip semiconductor device having I/O modules in an internal circuit area
摘要 <p>A semiconductor device includes an internal circuit area (11) including a plurality of I/O modules (51 to 58), and a peripheral area (12) receiving therein a pair of loop test lines (21, 22) for testing I/O buffers (30) in the I/O modules (51 to 58). The internal test line (23, 24) extending from each of the loop test lines (21, 22) toward the internal circuit area (11) includes an out-module test line (23, 24) formed as the topmost layer, a first in-module test line (23, 24) formed as the topmost layer and connected to the out-module test line (23, 24), and a second in-module test line (25, 26, 27, 28), a portion (25, 26) of which is formed by connecting the in-buffer test lines together. </p>
申请公布号 EP1376693(A3) 申请公布日期 2006.12.27
申请号 EP20030012092 申请日期 2003.05.28
申请人 NEC ELECTRONICS CORPORATION 发明人 MASUMURA, YOSHIHIRO;OH, NOBUTERU;FURUKAWA, HIROYUKI
分类号 H01L21/822;H01L23/58;H01L21/82;H01L27/02;H01L27/04;H01L27/118 主分类号 H01L21/822
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