发明名称 |
Non-volatile memory device and manufacturing method and operating method thereof |
摘要 |
A non-volatile memory device having a substrate, an n type well, a p type well, a control gate, a composite dielectric layer, a source region and a drain region is provided. A trench is formed in the substrate. The n type well is formed in the substrate. The p type well is formed in the substrate above the n type well. The junction of p type well and the n type well is higher than the bottom of the trench. The control gate which protruding the surface of substrate is formed on the sidewalls of the trench. The composite dielectric layer is formed between the control gate and the substrate. The composite dielectric layer includes a charge-trapping layer. The source region and the drain region are formed in the substrate of the bottom of the trench respectively next to the sides of the control gate.
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申请公布号 |
US7154142(B2) |
申请公布日期 |
2006.12.26 |
申请号 |
US20050158412 |
申请日期 |
2005.06.21 |
申请人 |
POWERCHIP SEMICONDUCTOR CORP. |
发明人 |
WONG WEI-ZHE;YANG CHING-SUNG;CHO CHIH-CHEN |
分类号 |
H01L29/788;H01L21/28;H01L21/336;H01L21/8246;H01L21/8247;H01L27/115;H01L29/792 |
主分类号 |
H01L29/788 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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