发明名称 Multi-element operand sub-portion shuffle instruction execution
摘要 An apparatus and method for performing a shuffle operation on packed data is described. In one embodiment, a 128-bit packed data operand having at eight data elements is accessed. In one embodiment, one of the data elements in the upper half of the data operand is shuffled into the upper half of a destination register. In another embodiment, one of the data elements in the lower half of the data operand is shuffled into the lower half of a destination register.
申请公布号 US7155601(B2) 申请公布日期 2006.12.26
申请号 US20010783779 申请日期 2001.02.14
申请人 INTEL CORPORATION 发明人 CHENNUPATY SRINIVAS;FUENTES, JR. CARLOS A.;THAKKAR SHREEKANT S.
分类号 G06F9/315;G06F9/30 主分类号 G06F9/315
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