| 摘要 |
A computationally efficient method and system for decoding shortened cyclic codes is presented. The increase in computational efficiency is achieved by improvement of the syndrome calculation step. Two embodiments of the present invention are described; the first embodiment is optimized for a hardware implementation and the second embodiment is optimized for a Digital Signal Processor (DSP) implementation. The present invention is applicable to decoding of all the binary shortened cyclic codes, including Fire codes used for Coding Scheme-1 (CS-1) for GSM.
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