发明名称 |
Packet transfer device, semiconductor device, and packet transfer system |
摘要 |
A packet transfer device has a layer 2 switch and performs switching by referring to header information of a 3rd layer and higher layers. Input/output ports receives packets from and transmits packets to other devices connected to the packet transfer device. A header information extracting circuit extracts header information belonging to a 3rd layer (network layer) and higher layers of a network protocol from packets inputted from the respective input/output ports. A table stores header information and control information corresponding to the header information in association with each other. A control information acquiring circuit acquires control information corresponding to the header information extracted by the header information extracting circuit from the table. A processing circuit processes packets based on the control information acquired by the control information acquiring circuit.
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申请公布号 |
US7154890(B2) |
申请公布日期 |
2006.12.26 |
申请号 |
US20020079405 |
申请日期 |
2002.02.22 |
申请人 |
FUJITSU LIMITED |
发明人 |
NAGATOMO TERUHIKO;ASANO KAZUYA;HASHIDA JUNICHI |
分类号 |
H04L12/56 |
主分类号 |
H04L12/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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