High-performance electrostatic clamp comprising a resistive layer, micro-grooves, and dielectric layer

摘要

An electrostatic clamp for securing a semiconductor wafer during processing. The electrostatic clamp includes a base member, a first dielectric layer, a second dielectric layer having a gas pressure distribution micro-groove network formed therein, a gas gap positioned between a backside of a semiconductor wafer and the second dielectric layer, and a pair of high voltage electrodes positioned between the first dielectric layer and the second dielectric layer.