发明名称 Integrated circuit die having an interference shield
摘要 A package for housing a device (e.g., an integrated circuit chip or die) includes a Faraday cage. The Faraday cage is at least partially formed in the integrated circuit die. The die includes conductive vias and solder balls surrounding a circuit. The package can be a ball grid array (BGA) package or flip chip package. The package substrate can include a ground plane.
申请公布号 US7151011(B2) 申请公布日期 2006.12.19
申请号 US20020243487 申请日期 2002.09.13
申请人 INSILICA, INC. 发明人 SRIDHARAN GURUSWAMI M.;SRIDHARAN KARTIK M.
分类号 H01L21/56;H01L23/12;H01L23/498;H01L23/522;H01L23/552;H01L23/58;H01L23/60 主分类号 H01L21/56
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