Demultiplexer circuit

摘要

A demultiplexer circuit which can simultaneously demultiplex plural pieces of input data while minimizing the circuit scale. The demultiplexer circuit includes an input line identification information addition circuit 2 for giving input line identification information to input data which have data identification information and are inputted through plural input lines 1 , respectively; a multiplexer 4 for outputting the input data which have been given the input line identification information, respectively, by the input line identification information addition circuit 2 through one common line 5 ; a filter 6 for filtering the data outputted from the multiplexer 4 on the basis of the input line identification information and the data identification information at one time; and a filter table 7 that contains filtering conditions which are used in the filter 6.