发明名称 Multi-chip package structure
摘要 A multi-chip package structure comprising a first chip, a patterned lamination layer, a plurality of first bumps, a second chip and second bumps is provided. The first chip has a first active surface. The patterned lamination layer is disposed on a portion area of the first active surface. The first chip has a plurality of first bonding pads disposed on the first active surface exposed by the patterned lamination layer and the patterned lamination layer has a plurality of second bonding pads disposed thereon. The second chip has a second active surface and the first bumps are disposed on the second active surface. The second chip is electrically connected to the first bonding pads through the first bumps. The second bumps are disposed on the second bonding pads. Moreover, the multi-chip package structure further comprises a component disposed on the first chip and electrically connects to the first bonding pads.
申请公布号 US7151317(B2) 申请公布日期 2006.12.19
申请号 US20040904404 申请日期 2004.11.09
申请人 ADVANCED SEMICONDUCTOR ENGINEERING, INC. 发明人 CHAO SHIN-HUA;LO JIAN-WEN
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人
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