发明名称 VIDEO SIGNAL RECEIVER FIXING PIXEL CLOCK AND CONTROL METHOD THEREOF
摘要 An image signal receiving apparatus for fixing a pixel clock and a control method therefor are provided to prevent a picture sparkle phenomenon and a picture disconnection phenomenon although an input frame rate and an output frame rate are different by fixing the pixel clock and interworking an output vertical synchronous signal to an input vertical synchronous signal. A video processor(110) converts an inputted analog video signal into a digital signal. A display processor(120) scales the video signal converted in the video processor(110) at output resolution. A display unit(130) displays the video signal scaled by the display processor(120). A detecting unit(140) detects whether an input vertical synchronous signal of the analog video signal is matched with an output vertical synchronous signal. A PLL(Phase Locked Loop)(150) generates a pixel clock. A timing generating unit(160) adjusts a horizontal frequency and a vertical frequency by the detected result of the detecting unit(140), generates a horizontal synchronous signal and a vertical synchronous signal by using the adjusted horizontal and vertical frequency and the pixel clock, and provides the horizontal synchronous signal and the vertical synchronous signal to the display processor(120) and the detecting unit.
申请公布号 KR100661167(B1) 申请公布日期 2006.12.18
申请号 KR20050103202 申请日期 2005.10.31
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM, BYEONG JIN
分类号 H04N5/04 主分类号 H04N5/04
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