| 摘要 |
A data output circuit of a DDR(Double Data Rate) semiconductor device and a semiconductor device comprising the same are provided to improve timing margin by preventing the distortion of data duty in the DDR semiconductor device. In a data output circuit(400) of a DDR semiconductor device, a first latch circuit(410) outputs output data corresponding to a first data, in response to a first logic level of a clock signal. A flip-flop circuit(420) latches a second data in response to a first edge of the clock signal. A buffer circuit(440,450) drives an output port in response to output data of the first latch circuit during a second logic level of the clock signal, and drives the output port in response to output data of the flip-flop circuit during the first logic level of the clock signal.
|
