| 摘要 |
PROBLEM TO BE SOLVED: To provide a multilayered bus system reducing a circuit scale and improving reliability of data stored in a storage. SOLUTION: This multilayered bus system is provided with an ECC circuit 16. The ECC circuit 16 generates write data with an ECC code as a slave function module and performs ECC error check processing on read data with an ECC code for correcting a data error and generating read data from which the ECC code is removed. When a data write instruction is given to a HD 3 from a CPU 10, a DMAC 12 outputs write data to be transferred via DMA to the ECC circuit 16, and the ECC circuit 16 stores the generated write data with the ECC in the HD 3. When a data read instruction is given to the HD 3 from the CPU 10, the DMAC 12 outputs the read data with the ECC read from the HD 3 to the ECC circuit 16, and the EDDC circuit 16 writes the generated read data in a SRAM. COPYRIGHT: (C)2007,JPO&INPIT
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