| 摘要 |
PROBLEM TO BE SOLVED: To provide a method for improving a speed of a DRAM by reducing time required for precharging operation. SOLUTION: A dynamic random access memory has a plurality of column-exclusive registers (29 and 31) and is controlled to refresh itself by consecutively reading a plurality of bit values (21 and 23) from capacitance storage cells (19 and 41). Then, continued refreshing steps to the same capacitance storage cell continue, the continued refreshing steps being equal in number to continued reading steps. When each bit value is read, the value is stored in each bit register secured for the cell. Provided interleaved refreshing minimizes DRAM access time and provides memory architecture. In such memory architecture, respectively independent register arrays are exclusive for quite different functions which serve CPUs and video systems and may support such functions. COPYRIGHT: (C)2007,JPO&INPIT
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