| 摘要 |
A nonvolatile semiconductor memory apparatus having a two-layer gate electrode transistor and its manufacturing method are provided to remove an intergate dielectric and to prevent decrease of coupling capacitance by employing a float gate electrode having a step. An isolation region(12) is formed in a semiconductor substrate(11). The isolation region is comprised of plural trenches and an isolation layer formed in the trench. An upper surface of the isolation region is higher than a surface of the semiconductor substrate. A gate dielectric(13) is formed between the isolation regions on the semiconductor substrate. A first gate electrode(14) is formed on the gate dielectric. An inter gate dielectric(15) is formed on the first gate electrode. A second gate electrode(16) is formed on the inter gate dielectric. The first gate electrode has a first part(14-1), a second part(14-2), and a third part(14-3). The first part is located between the isolation dielectrics. The second part is located on the first part. A part of the second part is located on the isolation region. The third part is located on the second part. A width of the second part is narrower than that of the third part.
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