发明名称 SELECTIVE POLYSILICON STUD GROWTH
摘要 A memory cell having a bit line contact and a method of manufacturing the memory cell is provided The memory cell may be a 6F<SUP>2 </SUP>or smaller memory cell. The bit line contact may have a contact hole bounded by insulating side walls, the contact hole may have a selective, epitaxially grown base layer, may be partially or completely filled with a doped polysilicon plug, and may have a silicide cap. The doped polysilicon plug may have an upper plug surface profile that is substantially free of concavities or substantially convex. Similarly, a storage node contact may comprise a doped polysilicon plug having an upper plug surface profile that is substantially free of concavities or that is substantially convex. Additionally, a semiconductor device having a conductive contact comprising a polysilicon plug may is provided. The plug may contact a capacitor structure.
申请公布号 US2006278912(A1) 申请公布日期 2006.12.14
申请号 US20060461195 申请日期 2006.07.31
申请人 TRAN LUAN 发明人 TRAN LUAN
分类号 H01L29/94 主分类号 H01L29/94
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