发明名称 |
Method and apparatus to reduce latency and improve throughput of input/output data in a processor |
摘要 |
Some embodiments include apparatus and method to transfer data directly between an input/output device and a processor to reduce latency and improve throughput of the processor. Other embodiments are described and claimed.
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申请公布号 |
US2006282560(A1) |
申请公布日期 |
2006.12.14 |
申请号 |
US20050147991 |
申请日期 |
2005.06.08 |
申请人 |
INTEL CORPORATION |
发明人 |
BELL D. M.;VASUDEVAN ANIL |
分类号 |
G06F13/00 |
主分类号 |
G06F13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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