| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To greatly increase the number of rewritable times while maintaining the long reliability of a semiconductor nonvolatile memory cell transistor by preventing the deterioration of data holding characteristics or the occurrence of disturbances even when writing and erasure are repeated. <P>SOLUTION: A memory cell transistor array 101 includes a plurality of memory cell transistors 100 capable of electrically writing and erasing data. The erasure of data of the memory cell transistor 100 is counted to be stored by a erasure counting circuit 107. When the number of erasure stored in the erasure counting circuit 107 exceeds a predetermined number of times, a memory control circuit 103 controls a temperature control circuit 105 to increase the temperature of the memory cell transistor array 101 by a temperature increasing mechanism. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
