发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To read data from a storage node at a high speed during reading. <P>SOLUTION: A main cell array is provided with a select gate SG extended in an up-and-down direction, a common source CS extended left and right below the select gate SG outside a cell area, word lines W0 to W15 extended left and right on the select gate SG in the cell area, a plurality of storage nodes arranged near the intersection parts of the word lines and the select gate SG and below the word lines, and a bit line MGB for transmitting the information of the storage nodes to a sense amplifier 11 via a select switch 21. It further includes a main cell division unit 20a having a reversed layer formed below the select gate SG in the cell area by applying a positive voltage to the select gate SG. A reference cell array is provided with a reference cell division unit 30a similar in configuration to the main cell division unit 20a. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2006338749(A) 申请公布日期 2006.12.14
申请号 JP20050160346 申请日期 2005.05.31
申请人 NEC ELECTRONICS CORP 发明人 SUDO NAOAKI
分类号 G11C16/06 主分类号 G11C16/06
代理机构 代理人
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