| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device comprising a compact lateral MOS transistor of low on-resistance in which each cell of a source and a drain is arranged in a lattice-like manner, and a leakage failure between the source and the drain is suppressed to achieve a high product yield, and to provide a method for manufacturing it. SOLUTION: The semiconductor device 100 is constituted by arranging each cell of the source (S) and the drain (D) of the lateral MOS transistor in a lattice-like manner in a transistor-forming region TR of a semiconductor substrate 10 which is surrounded by an insulating/separating trench 2 and has the end of a LOCOS 3 formed on the insulating/separating trench 2 as an outer periphery. At least one cell of the source (S) and the drain (D) arranged at the center apart from the end of the LOCOS 3 in the transistor-forming region TR has a maximum width of 10μm or less. COPYRIGHT: (C)2007,JPO&INPIT
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