| 摘要 |
Each channel comprises: an AD converter which converts a signal value of a corresponding input signal into a digital value in response to a received sampling clock; a counter which counts the pulses of the sampling clock; memory which sequentially stores the digital values at addresses corresponding to the counted values of the counter; a transmission/reception unit which outputs the counted value of the counter at a point in time at which acquisition of the waveform of the input signal is to be started in a case that the channel is set to be a main channel beforehand, and which receives the start data counted value from the main channel in a case that the channel is set to be a sub-channel; and an output unit which sequentially outputs the digital values stored in the memory with the digital value stored at the address corresponding to the start data counted value as the start data.
|
