发明名称 A FREQUENCY AND VOLTAGE SCALING ARCHITECTURE
摘要 A method and apparatus for scaling frequency and operating voltage of at least one clock domain of a microprocessor. More particularly, embodiments of the invention relate to techniques to divide a microprocessor into clock domains and control the frequency and operating voltage of each clock domain independently of the others.
申请公布号 WO2006057865(A3) 申请公布日期 2006.12.14
申请号 WO2005US41392 申请日期 2005.11.14
申请人 INTEL CORPORATION;MAGKLIS, GRIGORIOS;GONZALEZ, JOSE;GONZALEZ, ANTONIO 发明人 MAGKLIS, GRIGORIOS;GONZALEZ, JOSE;GONZALEZ, ANTONIO
分类号 G06F9/38;G06F1/12 主分类号 G06F9/38
代理机构 代理人
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