| 摘要 |
A semiconductor device and a wiring method for semiconductor devices are provided to reduce the area for mounting, by decreasing unbalance of load capacitance. A first gate(G1) and a second gate(G2) are installed adjacently to each other. A plurality of circuits is installed along the longitudinal direction of the gate. Each circuit includes the first and second gates and three diffusion regions(A1~A3) crossing the first and second gates, and selectively accesses the diffusion region of the circuits. In the circuits, a first circuit(1) includes a first diffusion region, the first gate, a second diffusion region, the second gate and a third diffusion region in sequence, and a second circuit(2) includes a fourth diffusion region(B1), the first gate, a fifth diffusion region(B2), the second gate and a sixth diffusion region(B3) in sequence. The circuit selectively accesses the diffusion region of the first circuit and the diffusion region of the second circuit. |
