发明名称 Data latch
摘要 A high-speed latch includes a latch unit and a first current source. The latch unit has a first input terminal for receiving a first input signal and a first output terminal for outputting a first output signal. The first current source is coupled to the first output terminal, and is enabled for providing the first output terminal with a first driving current to reduce a voltage difference between the first output signal and the first input signal when the first output signal and the first input signal correspond to different logic states.
申请公布号 US7149128(B2) 申请公布日期 2006.12.12
申请号 US20040904567 申请日期 2004.11.16
申请人 REALTEK SEMICONDUCTOR CORP. 发明人 RAZAVI BEHZAD;KANG HAN-CHANG
分类号 G11C7/10 主分类号 G11C7/10
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