发明名称 Method of early physical design validation and identification of texted metal short circuits in an integrated circuit design
摘要 A method and computer program product for early physical design validation and identification of texted metal short circuits in an integrated circuit design includes steps of: (a) receiving as input a representation of an integrated circuit design; (b) receiving as input a physical design rule deck that specifies rule checks to be performed on the integrated circuit design; (c) generating a specific rule deck from the physical design rule deck wherein the specific rule deck includes only physical design rules that are specific to one of identifying texted metal short circuits in the integrated circuit design and power distribution and input/output cell placement in the integrated circuit design; and (d) performing a physical design validation on the integrated circuit design from the specific rule deck.
申请公布号 US7149989(B2) 申请公布日期 2006.12.12
申请号 US20040947498 申请日期 2004.09.22
申请人 LSI LOGIC CORPORATION 发明人 LAKSHMANAN VISWANATHAN;HOLESOVSKY ALAN;MILLER LISA M.;KUPPINGER JONATHAN P.
分类号 G06F17/50 主分类号 G06F17/50
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