| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory apparatus which can be miniaturized. <P>SOLUTION: The apparatus is provided with memory cells MC including a floating gate and a control gate, a memory cell array 26 provided with a plurality of memory cells, word lines WL connected to the control gate of the memory cell MC of the same row, row decoders 21a, 21b selecting the word line WL, a first MOS transistor 43 which is provided for each word line, in which a drain is connected to the word line and the first voltage BD 1 is applied to a source, and which transfers the first voltage BD 1 to a non-selection word line WL, and a second MOS transistor 44 which is provided for each word line, in which a drain is connected to the word line WL and the second voltage is applied to a source, and which transfers the second voltage to a selection word line WL, a back gate bias VPW2 of the first MOS transistor 43 is controlled independently from the potential of the source. <P>COPYRIGHT: (C)2007,JPO&INPIT |
