发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS TEST METHOD
摘要 <P>PROBLEM TO BE SOLVED: To make efficient a burn-in test in a semiconductor integrated circuit provided with a plurality of scan chains. <P>SOLUTION: The semiconductor integrated circuit includes a plurality of the scan chains composed by connecting scan cells in series, and a selecting circuit capable of connecting the scan cells contained in different scan chains. As a test for the semiconductor integrated circuit of this configuration, (1) a scan signal is input into each of the scan chains, a first scan test for monitoring the output of each of the scan chains is executed; on the occasion of the burn-in test, (2-1) in such a state that the scan chains are connected, a second scan test for monitoring the output produced when the scan signal is input, and (2-2) a test by a logical BIST are executed. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006329876(A) 申请公布日期 2006.12.07
申请号 JP20050156075 申请日期 2005.05.27
申请人 NEC ELECTRONICS CORP 发明人 TANAKA YOSHIKAZU
分类号 G01R31/28;G01R31/30;G06F11/22;H01L21/822;H01L27/04 主分类号 G01R31/28
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