发明名称 A reconfigurable system for verification of electronic circuits using high-speed serial links to connect asymmetrical evaluation and canvassing instruction processors
摘要 A reconfigurable scalable system for verifying electronic circuit designs in anticipation of fabrication by compiling a hardware description to instructions for canvassing processors and instructions for circuit evaluation processors which are scalably interconnected by reconfigurable high-speed serial links to provide simulation and emulation, having deterministically scheduled transfer of circuit signal values among the large number of circuit evaluation processors.
申请公布号 US2006277020(A1) 申请公布日期 2006.12.07
申请号 US20060307206 申请日期 2006.01.26
申请人 发明人 GANESAN SUBBU;BROUKHIS LEONID A.;NARAYANASWAMY RAMESH;NIXON IAN M.;SPENCER THOMAS H.
分类号 G06F17/50 主分类号 G06F17/50
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