发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit that receives no noise signal in mistake, even under a multi-noise environment or in a state where noise tends to be produced in synchronism with the sampling period. <P>SOLUTION: The semiconductor integrated circuit includes a sampling section a delay section, a first arithmetic section, and a second arithmetic section. The sampling section samples an input signal received externally synchronously with a clock signal and outputs the sampled signal as a first signal. The delay section delays the first signal, on the basis of the clock signal and outputs the result as a second signal. The first arithmetic section calculates whether the level of the input signal lasts for a prescribed time or over, on the basis of the first and the second signals. When the signal level continues for the prescribed time or over, the first arithmetic section outputs an output signal with a signal level consecutive for a prescribed time or over synchronously with the clock signal. The second arithmetic section asynchronously controls the sampling section, on the basis of the input signal and the output signal. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006332945(A) 申请公布日期 2006.12.07
申请号 JP20050152156 申请日期 2005.05.25
申请人 NEC ELECTRONICS CORP 发明人 TANAKA NOBUYUKI
分类号 H03K5/1252;H03K5/125 主分类号 H03K5/1252
代理机构 代理人
主权项
地址