| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device and a data write and read method thereof. <P>SOLUTION: The device is constituted of a clock signal generating circuit to which an external clock signal is input and which generates first and second signals phase-frequency-synchronizing with the external clock signal in a normal operation and generates the first clock signal being the same as the above and the second clock signal having a high frequency while having the same phase in a test operation, a write-in circuit parallel-converting serial data of the first prescribed bits input with the first data rate in the normal and test write-in operation and outputting it to a memory cell array, and a read-out circuit serial-converting parallel data of the prescribed bits output from the memory cell array responding to the first clock signal in the normal and test read-out operation in response to the second clock signal in the normal read-out operation and outputting it with the first data rate, and serial-converting the data in response to the second clock signal in the test read-out operation and outputting it with the second rate. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
