SEMICONDUCTOR STORAGE APPARATUS AND SEMICONDUCTOR INTEGRATED CIRCUIT INCORPORATING THE SAME

摘要

A semiconductor storage apparatus wherein the number of memory cells used as bypass capacitors can be dynamically changed. In each memory block, a selector signal line is provided in parallel with each word line. In a pair of word line and selector signal line adjacent to each other, the states thereof are maintained such that they are opposite to each other. Additionally, in each memory block, a branch of a power supply line is provided in parallel with each bit line. In each memory cell, a first transistor connects a capacitor to the bit line in accordance with the state of the word line, while a second transistor connects the same capacitor to the power supply line branch in accordance with the state of the selector signal line. In the memory cells aligned in the row direction, the gates of the first transistors are connected to the same word line, while the gates of the second transistors are connected to the same selector signal line.