发明名称 BUS CONTROL SYSTEM AND COMPUTER SYSTEM
摘要 PROBLEM TO BE SOLVED: To improve processing performance of a bus by providing a specific adapter with a means capable of simultaneously issuing a plurality of split read requests from an identical adapter in a system bus such as a work station. SOLUTION: As bus protocols, a plurality of module ID are logically allocated to one bus adapter 405, 408, 409, or 410, and the bus adapter 405 at a starter side assures sequence of read data according to module ID information of response cycle. As parallel processing of a read access from an identical adapter becomes possible, a response time of a system bus access can be improved. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006331452(A) 申请公布日期 2006.12.07
申请号 JP20060207371 申请日期 2006.07.31
申请人 HITACHI LTD 发明人 KONDO NOBUKAZU;KANEKO ASASHI;OKAZAWA KOICHI;GENMA HIDEAKI;MOCHIDA TETSUYA;HAYASHI TAKEHISA
分类号 G06F13/36 主分类号 G06F13/36
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