发明名称 |
Evaluation semiconductor device |
摘要 |
An evaluation semiconductor device is used for evaluating a yield of a DRAM portion of an integrated circuit device. The evaluation semiconductor device includes an evaluation gate interconnect provided in a layer corresponding to a gate interconnect layer of the DRAM portion; and an evaluation source contact corresponding to a source contact of a capacitor included in the DRAM portion and connected to the evaluation gate interconnect.
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申请公布号 |
US2006273371(A1) |
申请公布日期 |
2006.12.07 |
申请号 |
US20060367549 |
申请日期 |
2006.03.06 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
TOHYAMA YOKO;OKUNO YASUTOSHI |
分类号 |
H01L27/108 |
主分类号 |
H01L27/108 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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