发明名称 SOLDER PRINTING METHOD AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a solder printing method for reducing occurrence of a void in a via hole and to provide a manufacturing method of a semiconductor device. SOLUTION: The method for printing solder on a pad 11 installed in a region comprising an inner part of a recessed via hole H from a surface of a built-up substrate 100 to an inner layer 3 and a periphery of an opening face of the via hole H, is provided with: a first process of applying cream-like solder S1 onto the pad 11 in a state where the periphery of the opening face of the via hole H is covered with a mask M1 and burying solder S1 in the via hole H; and a second process of applying cream-like solder S2 to a part covered with the mask M1 at the periphery of the opening face of the via hole H after the first process. Since adhesion of solder S1 is prevented in the whole periphery of the opening face at the time of burying cream-like solder S1 in the via hole H, escape of air to outside from within the via hole H is secured. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006332159(A) 申请公布日期 2006.12.07
申请号 JP20050150588 申请日期 2005.05.24
申请人 SEIKO EPSON CORP 发明人 INADA HIROAKI
分类号 H05K3/34;H01L23/12 主分类号 H05K3/34
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