发明名称 Method of manufacturing semiconductor integrated circuit device, and semiconductor integrated circuit device made by its method
摘要 Mutual diffusion of impurities in a gate electrode is suppressed near a boundary between an n-channel type MISFET and a p-channel type MISFET, which adopt a polycide's dual-gate structure. Since a gate electrode of an n-channel type MISFET and a gate electrode of a p-channel type MISFET are of mutually different conductivity types, they are separated to prevent the mutual diffusion of the impurities and are electrically connected to each other via a metallic wiring formed in the following steps. In a step before a gate electrode material is patterned to separate the gate electrodes, the mutual diffusion of the impurities before forming the gate electrodes is prevented by performing no heat treatment at a temperature of 700° C. or higher.
申请公布号 US2006275969(A1) 申请公布日期 2006.12.07
申请号 US20060503161 申请日期 2006.08.14
申请人 RENESAS TECHNOLOGY CORP. 发明人 SAKAI SATOSHI;MATSUMOTO DAICHI;ASAKA KATSUYUKI;HASEGAWA MASATOSHI;MORI KAZUTAKA
分类号 H01L21/8234;H01L27/092;H01L21/8238;H01L21/8242;H01L21/8244;H01L27/10;H01L27/105;H01L27/108;H01L27/11 主分类号 H01L21/8234
代理机构 代理人
主权项
地址