| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a clock recovery circuit which is simple in its circuit configuration, and reproduces a clock immediately after data is received even at a high transmission rate of data. <P>SOLUTION: The clock recovery circuit 100 has: a pulse signal generation circuit 1 for detecting a transition of reception data to generate a pulse signal; a delay element group 2 in which a plurality of delay elements corresponding to a number which subtracts one from the number of a maximum non-transition period of the reception data are series-connected; a delay time control circuit 3 which is controlled according to a delay time control signal so as to make delay times of the respective delay elements of the delay element group 2 equal to 1 data period portion of the reception data, on the basis of a preset transmission rate of the reception data; a delay pulse signal generation circuit 4 which inputs the pulse signal to the delay element group 2 and outputs a plurality of delay pulse signals which are delayed sequentially by one data period portion of the reception data; and an OR circuit 5 which makes a logical adding of the pulse signal and the plurality of delay pulse signals and outputs it as a reproduced clock signal. <P>COPYRIGHT: (C)2007,JPO&INPIT |
