发明名称 Memory system combining flash EEPROM and FeRAM
摘要 A memory system includes a ferroelectric memory formed by arranging a plurality of memory cells having a ferroelectric capacitor and cell transistor, a flash EEPROM formed by arranging a plurality of memory cells having a floating gate and capable of electrically erasing and writing data, a control circuit configured to control the ferroelectric memory and flash EEPROM, and an interface circuit configured to communicate with the outside. The flash EEPROM stores data. The ferroelectric memory stores at least one of root information for storing the data, directory information, the file name of the data, the file size of the data, file allocation table information storing the storage location of the data, and the write completion time of the data.
申请公布号 US2006274566(A1) 申请公布日期 2006.12.07
申请号 US20060443388 申请日期 2006.05.31
申请人 TAKASHIMA DAISABURO;FUJII SHUSO;SUDA TAKAYA;SUKEGAWA HIROSHI 发明人 TAKASHIMA DAISABURO;FUJII SHUSO;SUDA TAKAYA;SUKEGAWA HIROSHI
分类号 G11C11/22 主分类号 G11C11/22
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