| 摘要 |
PROBLEM TO BE SOLVED: To lower interference signal generated by a digital phase synchronization loop. SOLUTION: A correction circuit (4) is provided in a digital phase synchronization loop that includes a first terminal (1), a second terminal (2), a discrete tuning oscillator (6), an integrator (10), a loop filter (11), and a feedback path. The correction circuit (4), in its input side, is connected to the input of the integrator (10), and in the output side, is connected to the output of the integrator (10). The correction circuit (4) is established to form a correction word (KS) from a word obtained from an operation word and a second frequency word (FwF), which are supplied to the input of the integrator (10). Thereby, a cyclic error component in the frequency setting word outputted from the integrator (10) is corrected by the correction circuit (4). COPYRIGHT: (C)2007,JPO&INPIT
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