| 摘要 |
A system and method are provided for generating accurate coefficients in a binary rate multiplier by signaling an enabling circuit to generate an enabling signal to the binary rate multiplier such that the average effect of the factored output signal corresponds to a signal multiplied by a predetermined coefficient value; where the system multiplies a signal by a plurality of factors in response to the enabling signal, where the smallest exponent of two is determined that is greater than the factor desired; and the desired factor is divided by the smallest exponent to generate a resulting fraction that is the duty cycle of the enabling signal.
|
